Corresponding author: Oscar Pérez ( oscar.perez@lien.uhp-nancy.fr ) © Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber. This article is freely available under the J.UCS Open Content License. Citation:
Pérez O, Berviller Y, Tanougast C, Weber S (2007) The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation. JUCS - Journal of Universal Computer Science 13(3): 349-362. https://doi.org/10.3217/jucs-013-03-0349 |