JUCS - Journal of Universal Computer Science 27(11): 1174-1192, doi: 10.3897/jucs.77247
Temporal Accelerators: Unleashing the Potential of Embedded FPGAs
expand article infoChristopher Cichiwskyj, Gregor Schiele§
‡ Universität Duisburg-Essen, Duisburg-Essen, Germany§ Universität Duisburg-Essen, Duisburg, Germany
Open Access

When the complexity of a problem rises, its solution requires more hardware resources. A usual way to solve this is to use larger processors and add more memory. When using Field Programmable Gate-Arrays (FPGAs), which can instantiate arbitrary circuit designs, a larger, more costly and power hungry chip is used. In this paper we propose a different approach, namely to split the problem into a graph of interdependent smaller tasks and to reconfigure a small FPGA during runtime to execute each of these tasks efficiently sequentially. This can result in cheaper and more energy efficient systems that can execute very complex problems locally. We present a basic analytical model, evaluate its accuracy and discuss initial insight from it.

IoT, Embedded, FPGA, Reconfigurable Hardware