Latest Articles from JUCS - Journal of Universal Computer Science Latest 17 Articles from JUCS - Journal of Universal Computer Science https://lib.jucs.org/ Thu, 28 Mar 2024 19:20:03 +0200 Pensoft FeedCreator https://lib.jucs.org/i/logo.jpg Latest Articles from JUCS - Journal of Universal Computer Science https://lib.jucs.org/ Weather Station IoT Educational Model Using Cloud Services https://lib.jucs.org/article/24151/ JUCS - Journal of Universal Computer Science 26(11): 1495-1512

DOI: 10.3897/jucs.2020.079

Authors: Ján Molnár, Simona Kirešová, Tibor Vince, Dobroslav Kováč, Patrik Jacko, Matej Bereš, Peter Hrabovský

Abstract: IoT technology is gaining more and more popularity in practice, as it collects, processes, evaluates and stores important measured data. The IoT is used every day in the work, in the home or smart houses or in public areas. It realizes the connectivity between real world and digital world which means, that it converts physical quantities of the real world in the form of analog signals into digital numbers stored in clauds. It is essential that students gain practical experience in the design and implementation of the IoT systems during their studies. The article first describes IoT issues and communication protocols used in IoT generally are closer described. Then the design and implementation of an educational model of IoT system - Weather station with the ThingSpeak cloud support is described. The created IoT model interconnects microcontroller programming, sensors and measuring, cloud API interfaces, MATLAB scripts which are useful to analyses the stored data, Windows and Android application developing.

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Research Article Sat, 28 Nov 2020 00:00:00 +0200
IoT Implementation in Remote Measuring Laboratory VMLab Analyses https://lib.jucs.org/article/24138/ JUCS - Journal of Universal Computer Science 26(11): 1402-1421

DOI: 10.3897/jucs.2020.074

Authors: Tibor Vince, Matej Bereš, Irena Kováčová, Ján Molnár, Branislav Fecko, Jozef Dziak, Iveta Tomčiková, Milan Guzan

Abstract: The paper presents analyses of the implementation of IoT in the patent technology of the remote measuring laboratory (VMLab). The technology allows to create a new electrical connection between different devices, where the connection diagram was not defined before. This may be done remotely around the world. To begin with, an application of this technology as a remote measuring laboratory is presented and described. Analyses of the possible application of IoT technology in the Remote Measurement Laboratory (VMLAB) with a final design are also presented. The research focuses on an efficient way to retrieve measured values synchronized over the Internet from multiple measuring devices and controllable devices, without an Ethernet or Wi-Fi interface from the manufacturer. The analyses may also be useful when implementing an additional IoT approach to existing systems.

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Research Article Sat, 28 Nov 2020 00:00:00 +0200
Detection of Size Modulation Covert Channels Using Countermeasure Variation https://lib.jucs.org/article/22669/ JUCS - Journal of Universal Computer Science 25(11): 1396-1416

DOI: 10.3217/jucs-025-11-1396

Authors: Steffen Wendzel, Florian Link, Daniela Eller, Wojciech Mazurczyk

Abstract: Network covert channels enable stealthy communications for malware and data exfiltration. For this reason, developing effective countermeasures for these threats is important for the protection of individuals and organizations. However, due to the large number of available covert channel techniques, it is considered impractical to develop countermeasures for all existing covert channels. In recent years, researchers started to develop countermeasures that (instead of only countering one particular hiding technique) can be applied to a whole family of similar hiding techniques. These families are referred to as hiding patterns. Considering above, the main contribution of this paper is to introduce the concept of countermeasure variation. Countermeasure variation is a slight modification of a given countermeasure that was designed to detect covert channels of one specific hiding pattern so that the countermeasure can also detect covert channels that are representing other hiding patterns. We exemplify countermeasure variation using the compressibility score, the ε-similarity and the regularity metric originally presented by Cabuk et al. All three methods are used to detect covert channels that utilize the Inter-packet Times pattern and we show that countermeasure variation allows the application of these countermeasures to detect covert channels of the Size Modulation pattern, too.

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Research Article Thu, 28 Nov 2019 00:00:00 +0200
A Cross-Device Architecture for Modelling Authentication Features in IoT Applications https://lib.jucs.org/article/23788/ JUCS - Journal of Universal Computer Science 24(12): 1758-1775

DOI: 10.3217/jucs-024-12-1758

Authors: Darwin Alulema, Javier Criado, Luis Iribarne

Abstract: The Internet of Things has presented a rapid development, due to the over-crowding of hardware and software platforms, greater deployment of communications networks, development of data analysis tools, among others. This development has led to a boom in applications focused on areas as varied as Smart Cities, Smart Agro, Smart Buildings, Smart Home, and Smart Health, in which people and things are interconnected. This is one of the reasons by which a review of the main technologies involved in the emergence of the Internet of Things must be carried out to determine those characteristics allowing that interconnection, but without neglecting security. This issue allows the user to feel con dent to use these new services. In this work, we propose a cross-device architecture that integrates technologies and implementations in homes, and uses basic authentication as a security scheme. To validate the cross-device proposal, a case study scenario has been designed, including and integrating digital-TV (DTV), Smart Phones and wearables devices for monitoring users physical activity.

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Research Article Fri, 28 Dec 2018 00:00:00 +0200
Target Selection in Head-Mounted Display Virtual Reality Environments https://lib.jucs.org/article/23528/ JUCS - Journal of Universal Computer Science 24(9): 1217-1243

DOI: 10.3217/jucs-024-09-1217

Authors: Difeng Yu, Hai-Ning Liang, Feiyu Lu, Vijayakumar Nanjappan, Konstantinos Papangelis, Wei Wang

Abstract: Target selection is one of the most common and important tasks in interactive systems. Within virtual reality environments, target selection can pose extra challenges to users because targets can be located far away, clustered together, and occluded from view. Although selection techniques have been explored, it is often unclear which techniques perform better across different environmental target density levels and which have higher levels of usability especially for recently released commercial head-mounted display (HMD) virtual reality systems and input devices. In this paper, we first review previous studies on target selection in HMD VR environments. We then compare the performances of three main techniques or metaphors (RayCasting, Virtual Hand, and Hand-Extension) using recently marketed VR headsets and input devices under different density conditions and selection areas. After, we select the best two techniques (RayCasting and Virtual Hand) for the second experiment to explore their relative performance and usability by adding different feedback to these two techniques. In the third experiment, we implemented three techniques with pointing facilitators and compared them against the best techniques from the second experiment, RayCasting with visual feedback, to assess their performance, error rates, learning effects, and usability. The three studies altogether suggest the best target selection features, based on techniques, feedback, and pointing facilitators for target density conditions in HMD VR environments.

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Research Article Fri, 28 Sep 2018 00:00:00 +0300
A Generalization of a Popular Fault-Coverage-Preserving Test Set Transformation https://lib.jucs.org/article/23287/ JUCS - Journal of Universal Computer Science 23(6): 560-585

DOI: 10.3217/jucs-023-06-0560

Authors: Monika Kapus-Kolar

Abstract: In the optimization of test sets for black-box conformance testing of objects specified and modelled as a finite state machine (FSM), a popular transformation is that under a certain precondition, a tail of a test is removed and appended to some other test. We propose a weaker precondition under which the transformation remains fault-coverage-preserving. Along with a weaker precondition, we propose some weaker sufficient conditions for its satisfaction. To demonstrate the usefulness of the relaxations, we employ them for generalizing the checking sequence (CS) construction method of Inan and Ural (1999), to incomplete FSMs and with additional dimensions for CS optimization. The method and its generalized version are exceptional in that they can handle also the case where the upper bound, call it m, assumed for the size of the state set of the FSM under test is not less than twice the size, call it n, of the state set of the specification FSM. We prove that for complete FSMs, the additional optimization dimensions facilitate that in the limit for increasingly large (m/n) and (a/m), with a the number of the defined inputs, the factor of CS length reduction is of the order

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Research Article Wed, 28 Jun 2017 00:00:00 +0300
PSO-Based Feature Selection for Arabic Text Summarization https://lib.jucs.org/article/23654/ JUCS - Journal of Universal Computer Science 21(11): 1454-1469

DOI: 10.3217/jucs-021-11-1454

Authors: Ahmed Al-Zahrani, Hassan Mathkour, Hassan Abdalla

Abstract: Feature-based approaches play an important role and are widely applied in extractive summarization. In this paper, we use particle swarm optimization (PSO) to evaluate the effectiveness of different state-of-the-art features used to summarize Arabic text. The PSO is trained on the Essex Arabic summaries corpus data to determine the best particle that represents the most appropriate simple/combination of eight informative/structure features used regularly by Arab summarizers. Based on the elected features and their relevant weights in each PSO iteration, the input text sentences are scored and ranked to extract the top ranking sentences in the form of an output summary. The output summary is then compared with a reference summary using the cosine similarity function as the fitness function. The experimental results illustrate that Arabs summarize texts simply, focusing on the first sentence of each paragraph.

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Research Article Sun, 1 Nov 2015 00:00:00 +0200
Multiplication and Squaring with Shifting Primes on OpenRISC Processors with Hardware Multiplier https://lib.jucs.org/article/23923/ JUCS - Journal of Universal Computer Science 19(16): 2368-2384

DOI: 10.3217/jucs-019-16-2368

Authors: Leandro Marin, Antonio Jara, Antonio Skarmeta

Abstract: Cryptographic primitives are the key component in the security protocols to support the authentication, key management and secure communication establishment. For that reason, this work presents the optimization of the Elliptic Curve Cryptography through the usage of Shifting Primes for constrained devices. Specifically, this presents the optimization for the chipsets JN51XX from NXP/Jennic, which are based on OpenRISC architecture and offer a class-2 constrained device. In details, Shifting Primes features have allowed to optimize the multiplication and squaring through a double accumulator and shifting reduction. This work is ancillary to the previous works about optimization of Shifting Primes for class-1 constrained devices. The optimization of the Elliptic Curve Cryptography for the class-2 constrained devices brings several opportunities for realistic scenarios, where the security interoperability between a gateway (class-2 device) and end-nodes (class 1 devices) is a major requirement.

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Research Article Tue, 1 Oct 2013 00:00:00 +0300
Self-Aware Trader: A New Approach to Safer Trading https://lib.jucs.org/article/23892/ JUCS - Journal of Universal Computer Science 19(15): 2292-2319

DOI: 10.3217/jucs-019-15-2292

Authors: Javier Fernández, Juan Augusto, Giuseppe Trombino, Ralf Seepold, Natividad Madrid

Abstract: Traders are required to work in the financial market with highly complex information and to perform efficiently under high levels of psychological pressure. Multiple disciplines, from programs with artificial intelligence to complex mathematical functions, are used to help traders in their effort to maximize profits. However, an essential problem not yet considered in this rapidly evolving environment is that traders are not supported to adequately manage how stress influences their decisions. This paper takes into consideration the negative influences of stress on individuals and proposes a system designed to support traders by providing them with information that can reduce the likelihood of poor decision-making. The system has been designed considering both technical and physiological aspects to make information available in a suitable way. Biometric sensors are used to collect data associated with stress, a software platform then analyses this information and displays it to the trader. The resulting system is capable of making individual traders, as well as teams of traders, self-aware of their levels of stress. The system has been tested in real environments and the results provide evidence that self-aware traders benefit from the system by reducing risky decision-making.

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Research Article Sun, 1 Sep 2013 00:00:00 +0300
A Modular System for Rapid Development of Telemedical Devices https://lib.jucs.org/article/23465/ JUCS - Journal of Universal Computer Science 19(9): 1242-1256

DOI: 10.3217/jucs-019-09-1242

Authors: Jan Havlik, Lenka Lhotska, Jakub Parak, Jan Dvorak, Zdenek Horcik, Matous Pokorny

Abstract: Remote patient monitoring is gradually attracting more attention as the population in developed countries ages, and as chronic diseases appear more frequently in the population. Miniaturization in electronics and mobile technologies has led to rapid development of various wearable systems for remote monitoring of vital signs, supervision systems in home care, assistive technologies and similar systems. There is a significant demand for developing the necessary devices very rapidly, especially for shortening the way from an idea to a first function sample. This paper presents a solution for rapidly developing devices for telemedical applications, remote monitoring and assistive technologies. The approach used here is to design and realize a modular system consisting of input modules for signal acquisition, a control unit for signal pre-processing, handshaking of data communication, controlling the system and providing the user interface and communication modules for data transmission to a superordinate system. A description of specific applications developed on the basis of the system is also presented in the paper.

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Research Article Wed, 1 May 2013 00:00:00 +0300
Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach https://lib.jucs.org/article/23313/ JUCS - Journal of Universal Computer Science 18(7): 937-969

DOI: 10.3217/jucs-018-07-0937

Authors: Maurizio Palesi, Rafael Tornero, Juan Orduñna, Vincenzo Catania, Daniela Panno

Abstract: Mainstream electronic designs are realized by Systems-on-Chips (SoCs) that push the limits of integration. The advancement of manufacturing technologies in terms of integration leads us to SoCs with many (e.g., 10-1000) digital units (e.g., processor cores, controllers, storage, application-specific units) that need to be interconnected in an efficient and reliable way. The Network-on-Chip (NoC) design paradigm emerged recently as a promising alternative to classical bus-based communication architectures. Aside from better predictability and lower power consumption, the NoC approach offers greater scalability compared to previous solutions for on-chip communication. The design flow of NoCs include several key issues. Among other parameters, the decision of where cores have to be topologically mapped and also the routing algorithm represent two highly correlated design problems that must be carefully solved for any given application in order to optimize different performance metrics. The strong correlation between the different parameters often makes that the optimization of a given performance metric has a negative effect on a different performance metric. In this paper we propose a new strategy that simultaneously refines the mapping and the routing function to determine the Pareto optimal configurations which optimize average communication delay and routing robustness. The proposed strategy has been applied on both synthetic and real traffic scenarios. The obtained results show how the solutions found by the proposed approach outperforms those provided by other approaches proposed in literature, in terms of both performance and fault tolerance.

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Research Article Sun, 1 Apr 2012 00:00:00 +0300
ACO-based Algorithms for Search and Optimization of Routes in NoC Platform https://lib.jucs.org/article/23312/ JUCS - Journal of Universal Computer Science 18(7): 917-936

DOI: 10.3217/jucs-018-07-0917

Authors: Luneque Junior, Nadia Nedjah, Luiza Mourelle

Abstract: Network-on-Chip (NoC) have been used as an interesting option in design of communication infrastructures for embedded systems, providing a scalable structure and balancing the communication between cores. Because several data packets can be transmitted simultaneously through the network, an efficient routing strategy must be used in order to avoid congestion delays. In this paper, ant colony algorithms were used to find and optimize routes in a mesh-based NoC. The routing optimization is driven by the minimization of total latency in packets transmission. The simulation results show the effectiveness of the ant colony inspired routing by comparing it with general purpose algorithms for deadlock free routing under different traffic patterns.

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Research Article Sun, 1 Apr 2012 00:00:00 +0300
Online Network-on-Chip Switch Fault Detection and Diagnosis Using Functional Switch Faults https://lib.jucs.org/article/29279/ JUCS - Journal of Universal Computer Science 14(22): 3716-3736

DOI: 10.3217/jucs-014-22-3716

Authors: Naghmeh Karimi, Armin Alaghi, Mahshid Sedghi, Zainalabedin Navabi

Abstract: This paper presents efficient methods for online fault detection and diagnosis of Network-on-Chip (NoC) switches. The fault model considered in this research is a system level fault model based on the generic properties of NoC switch functionality. The proposed method is evaluated by fault simulation in a platform using this system level fault model. The experimental results show that with a relatively low area overhead, a large number of NoC switch faults can be detected and diagnosed.

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Research Article Sun, 28 Dec 2008 00:00:00 +0200
Pipeline-scheduling Simulator for Educational Purpose https://lib.jucs.org/article/28822/ JUCS - Journal of Universal Computer Science 13(7): 959-969

DOI: 10.3217/jucs-013-07-0959

Authors: José Chaves-González, Miguel A. Vega-Rodríguez, Juan Gómez-Pulido, Juan Sánchez-Pérez

Abstract: This paper presents a project that provides both, to professors and to students, a tool that is useful for studying, teaching and learning how pipelines work and how they can be scheduled in an easy and widespread way. The project is called PipeSim, and features static and dynamic pipelines with a very attractive, dynamic and intuitive interface. It is well known that pipeline and pipeline-scheduling are very relevant concepts in computer science studies and it is very important that students can learn these in an easy and reliable way. The simulator makes easy both working in depth about pipeline scheduling and working slowly paying attention in the different stages of the scheduling. However, we designed the simulator knowing that principal users would be students with no experience, so both the execution and the presentation of the results have been carefully developed. In addition to this, to check the success of PipeSim, a survey has been made among some students that used the simulator. Results reveal that this kind of applications has a great acceptance among students, thought they consider that simulators are complements to the lessons given by the professor and never a substitute for them.

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Research Article Sat, 28 Jul 2007 00:00:00 +0300
Hardware Implementation of an Efficient Correlator for Interleaved Complementary Sets of Sequences https://lib.jucs.org/article/28752/ JUCS - Journal of Universal Computer Science 13(3): 388-406

DOI: 10.3217/jucs-013-03-0388

Authors: María del Carmen Peréz, Jesús Ureña, Álvaro Hernández, Carlos Marziani, Ana Jiménez, William Marnane

Abstract: Some sensor systems are characterized by multiple simultaneous aperiodic emissions, with low signal-to-noise ratio and asynchronous detection. In these systems, complementary sets of sequences can be used to encode emissions, due to their suitable auto-correlation and cross-correlation properties. The transmission of a complementary set can be accomplished by interleaving the sequences of the set, generating a macro-sequence which is easily transmitted by a BPSK modulation. The detection of the macrosequence can be performed by means of efficient correlation algorithms with a notably decreased computational load and hardware complexity. This work presents a new hardware design in configurable logic of an efficient correlator for macrosequences generated from complementary sets of sequences. A generic implementation has been achieved, so the configuration can be changed according to the requirements of the application. The developed correlator has been tested in an ultrasonic pulse compression system in which real-time is needed. However, it is applicable in any multi-sensor or communication system where the goal is to make simultaneous emissions from different independent sources, minimizing mutual interference.

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Research Article Wed, 28 Mar 2007 00:00:00 +0300
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation https://lib.jucs.org/article/28747/ JUCS - Journal of Universal Computer Science 13(3): 349-362

DOI: 10.3217/jucs-013-03-0349

Authors: Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber

Abstract: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining and dynamic total reconfiguration (DTR). The originality of our implementation is that it computes sequentially in the FPGA the Key and Cipher part of the AES algorithm. This dynamic reconfiguration implementation allows a good optimization of logic resources with a high throughput. This architecture employs only 11619 slices allowing a considerable economy of the resources and reaching a maximum throughput of 44 Gbps.

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Research Article Wed, 28 Mar 2007 00:00:00 +0300
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip https://lib.jucs.org/article/28599/ JUCS - Journal of Universal Computer Science 12(4): 370-394

DOI: 10.3217/jucs-012-04-0370

Authors: Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi

Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components, mixed-signal I/O cores) in a single silicon die. The large number of resources that have to communicate makes the use of interconnection systems based on shared buses inefficient. One way to solve the problem of on-chip communications is to use a Network-on-Chip (NoC)-based communication infrastructure. Such interconnection systems offer new degrees of freedom, exploration of which may reveal significant optimization possibilities: the possibility of arranging the computing and storage resources in an NoC, for example, has a great impact on various performance indexes. The paper addresses the problem of topological mapping of intellectual properties (IPs) on the tiles of a mesh-based NoC architecture. The aim is to obtain the Pareto mappings that maximize performance and minimize power dissipation. We propose a heuristic technique based on evolutionary computing to obtain an optimal approximation of the Pareto-optimal front in an efficient and accurate way. At the same time, two of the most widely-known approaches to mapping in mesh­based NoC architectures are extended in order to explore the mapping space in a multi-criteria mode. The approaches are then evaluated and compared, in terms of both accuracy and efficiency, on a platform based on an event-driven trace-based simulator which makes it possible to take account of important dynamic effects that have a great impact on mapping. The evaluation performed on both synthesized traffic and real applications (an MPEG-4 codec) confirms the efficiency, accuracy and scalability of the proposed approach.

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Research Article Fri, 28 Apr 2006 00:00:00 +0300