DOI: 10.3897/jucs.103264

Authors: Ildevana Poltronieri, Avelino Francisco Zorzo, Maicon Bernardino, Edson OliveiraJr

Abstract: Software architects and developers often use Domain-Specific Languages (DSLs) to model or code applications. However, designing a DSL that effectively represents its domain can be a challenge, potentially contributing to poor uptake and usage. To the best of our knowledge, one issue is that DSL designers may evaluate their language’s usability using ad hoc processes, due to a lack of expertise in usability evaluation. Additionally, current approaches lack well-defined processes and may not yield the desired results for DSL designers. Therefore, DSL designers require a well-defined usability evaluation process to assess how architects, developers, and end users perceive their DSL. This paper introduces Usa-DSL, a Usability Evaluation Process for Domain-Specific Languages. Usa-DSL aims to assist DSL designers in evaluating their languages in terms of ease and quality of use, without requiring deep knowledge of usability evaluation. We analyze the feasibility of Usa-DSL and show that it is a useful and user-friendly tool for evaluating DSLs.

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DOI: 10.3897/jucs.2020.044

Authors: Mohammed Al-Saleh, Ethar Qawasmeh, Ziad Al-Sharif

Abstract: The rapid development in the digital world has contributed to the dramatic increase in the number of cybercrimes. An application's volatile data that is kept in memory (RAM) could give clues on how a criminal has been using the application up to acquisition time. Unfortunately, application-level memory forensics has been conducted in an ad hoc manner because a forensic investigator has to come up with a new technique for a new application. This process has become problematic and exhausting. This paper proposes a general solution to investigate any application in memory. We heavily utilize applications' debugging information generated by compilers in our solution. Furthermore, we extend Volatility [Walters, 2007], an open-source memory forensic framework, by developing and integrating a plugin to investigate applications in memory. We design several experiments to evaluate the effectiveness of our plugin. Interestingly, our plugin can parse debugging information and extract variables' names and data types regardless of their scope and complexity. In addition, we experimented with a real world application and succeeded in collecting vital information out of it. By accurately computing the Virtual Addresses (VA) of variables along with their allocated memory sizes based on their types, we are able to extract their values out of memory. In addition, we trace call stacks as per threads to extract local variables' values. Finally, direct and indirect pointers are successfully dereferenced.

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DOI: 10.3217/jucs-025-04-0390

Authors: Matias Micheletto, Rodrigo Santos, Javier Orozco

Abstract: In this paper we present meta-heuristics to solve the energy aware reward based scheduling of real-time tasks with mandatory and optional parts in homogeneous multi-core processors. The problem is NP-Hard. An objective function to maximize the performance of the system considering the execution of optional parts, the benefits of slowing down the processor and a penalty for changing the operation power-mode is introduced together with a set of constraints that guarantee the real-time performance of the system. The meta-heuristics are the bio-inspired methods Particle Swarm Optimization and Genetic Algorithm. Experiments are made to evaluate the proposed algorithms using a set of synthetic systems of tasks. As these have been used previously with an Integer Lineal Programming approach, the results are compared and show that the solutions obtained with bio-inspired methods are within the Pareto frontier and obtained in less time. Finally, precedence related tasks systems are analyzed and the meta-heuristics proposed are extended to solve also this kind of systems. The evaluation is made by solving a traditional example of the real-time precedence related tasks systems on multiprocessors. The solutions obtained through the methods proposed in this paper are good and show that the methods are competitive. In all cases, the solutions are similar to the ones provided by other methods but obtained in less time and with fewer iterations.

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DOI: 10.3217/jucs-023-07-0636

Authors: Gaoshan Deng, Quanxi Feng, Pan Zheng, Tao Song

Abstract: Heterogeneous computing systems (HCSs) use many heterogeneous processors or cores to perform particular tasks. To address the requirement of green IT, several power management techniques have been developed to reduce the energy consumption of these systems. Dynamic voltage scaling, which dynamically changes the supply voltage of processors during the execution of an application, is widely used. However, reducing supply voltage decreases computation speed. Therefore, system makespan and energy consumption need to be considered at the same time. We propose a multi-objective scheduling algorithm based on decomposition for scheduling of the system workflow. Through experiments, we examine the performances of several algorithms, including the proposed one, in different benchmarks and real-world applications. Results show that our algorithm demonstrates better performance than other state-of-art evolutionary algorithms under various conditions involving the use of different crossover and mutation operators.

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DOI: 10.3217/jucs-017-11-1572

Authors: Leo Ordinez, David Donari, Rodrigo Santos, Javier Orozco

Abstract: In this paper, the Behavioral Importance Priority Server (BIPS) algorithm is proposed to schedule sets of hard/soft real-time tasks. The mechanism postpones or advances the execution of the next instance of a task according to the value obtained from a function properly associated to the behavior of the task; as a consequence, there is a flexible adaptation of the bandwidth required by each server. A synchronization method is introduced to prevent deadlocks and priority inversions in the case of sets of tasks sharing resources along with the necessary and sufficient conditions for the schedulability analysis. A software framework proposing an abstract architecture of a system based on BIPS is also presented. The BIPS software framework intends to bridge the gap between theoretical scheduling aspects and the actual implementation of them. Since BIPS is capable of managing very different sets of tasks, it covers a wide variety of applications found in the real world.

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DOI: 10.3217/jucs-009-06-0542

Authors: Kai Mertins, Peter Heisig, Kay Alwert

Abstract: Within a business environment, where the fast and reliable access to knowledge is a key success factor, an efficient handling of the organizational knowledge is crucial. Therefore the need for methods and techniques, which allow to structure and maintain complex knowledge bases according to the requirements emerging from the daily work have a high priority. This article provides a business process oriented approach to structure organizational knowledge and information bases. The approach was developed within applied research in the industrial, service and administrative sector. Following this approach, three different types of knowledge structures and their visualization have been developed by the Fraunhofer IPK and are currently applied and tested in organizations. Beside the approach itself, these three types of knowledge structure and the cases of application shall be introduced here.

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DOI: 10.3217/jucs-008-08-0808

Authors: Hartmut Surmann, Antonio Morales

Abstract: This paper presents a complete system for scheduling transportation orders to a fleet of autonomous mobile robots in service environments. It consists of the autonomous mobile robots, a user friendly interface to acquire the orders for the robots via internet and to store them in a database, a general language for modeling multistorey buildings with XML and the scheduling algorithms. The model description of the buildings is used to plan the paths for the robots and to estimate the cost and times for the orders. One challenging key problem - the multi robot cooperation - is solved by the scheduling algorithms and by giving autonomy to the service robots.

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DOI: 10.3217/jucs-006-10-0928

Authors: K. Gopinath, M. K. Narasinhan

Abstract: Block multithreaded architectures tolerate large memory and synchronization latencies by switching contexts on every remote-memory-access or on a failed synchronization request. We study the performance of a waiting mechanism called switch-blocking where waiting threads are disabled (but not unloaded) and signalled at the completion of the wait in comparison with switch_spinning where waiting threads poll and execute in a round-robin fashion. We present an implementation of switch-blocking on a cycle-by-cycle simulator for Alewife (a block multithreaded machine) for both remote memory accesses and synchronization operations and discuss results from the simulator. Our results indicate that while switch-blocking almost always has better performance than switch-spinning, its performance is similar to switch-spinning under heavy lock contention. Support for switch-blocking for remote memory accesses may be appropriate in the future due to their strong interactions with synchronization operations.

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