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Pavel Vasilyev
University Paris-East
Paris, France
1 article by this author
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Research Article
Simulation of Timed Abstract State Machines with Predicate Logic Model-Checking
Anatol Slissenko
,
Pavel Vasilyev
10.3217/jucs-014-12-1984
28-06-2008
Unique: 456 | Total: 519
| Access Period:
1984-2006
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