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Author

Yves Berviller

Université Henri Poincaré I
Nancy, France

1 article by this author

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Research Article

The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation

Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber

10.3217/jucs-013-03-0349

28-03-2007

Unique: 333 | Total: 387

349-362

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